Call with Digital Partnership and TTC countries

HORIZON-JU is a Horizon Europe Research and Innovation Action supporting low-TRL international collaboration between entities in EU Member States or Horizon Europe Associated Countries and partners in India, Singapore and Taiwan to advance chip design, alternative semiconductor manufacturing processes, heterogeneous integration and advanced packaging. Indicative EU contribution per project is €2.0–€2.5 millionwith a total topic envelope of about €5 million for roughly three projects, and the call uses a single-stage submission via the EU Funding & Tenders Portal with a deadline of 16 September 2026. Consortia must include at least one EU/Associated partner and at least one partner from the named countries, adhere to participation restrictions protecting European digital infrastructures and supply chains, and submit Ownership Control Declarations for eligibility assessment.

What it funds

Scope and expected outcomes

Research and Innovation Actions (RIA) to foster low-TRL international collaboration with selected Digital Partnership and Trusted Technology Contributors (TTC) countries on chip design, manufacturing and advanced packaging. Priorities include neuromorphic computing designs for ultra-low energy mobile applications, alternative semiconductor manufacturing processes for heterogeneous integration, and very advanced heterogeneous packaging (RF/mmW/THz, sensing, actuating, power management, photonics).

Who can apply:Consortia of legal entities eligible under Horizon Europe (industry including SMEs, research organisations, higher education, public bodies) cooperating across EU/Associated countries and specified partner countries (e.g. India, Singapore, Taiwan). Participation restrictions and Ownership Control Declarations apply as described in the work programme ¹.

1. 1Action type: HORIZON JU Research and Innovation Actions (RIA)
2. 2Deadline: 16 September 2026 (single-stage submission)
3. 3Objective: early-stage R&I collaborations on design, manufacturing processes and advanced heterogeneous packaging

Apply via the EU Funding & Tenders Portal. For call-specific documents and templates see Appendix 7 to the Work Programme — Electronic Components and Systems (ECS). For questions contact Calls@chips-ju.europa.eu ¹.

Footnotes

1. 1Full topic page and call documents: HORIZON-JU-CHIPS-2026-3-RIA topic details.

Opportunity snapshot

Call identifier HORIZON-JU. Type of action:HORIZON JU Research and Innovation Actions (RIA). Submission deadline: 16 September 2026 (single-stage, open call via the EU Funding & Tenders Portal). Expected EU contribution per project: €2.0 million to €2.5 million (Chips JU guidance). The topic fosters low-TRL international collaboration with Digital Partnership and TTC countries on advanced packaging, heterogeneous integration, photonic chip technologies and related manufacturing/process innovations.

Primary objectives and expected outcomes:Projects must focus on areas where Digital Partnership countries bring complementary expertise and should contribute to at least one or more of the following outcomes: Innovative design and integration concepts for neuromorphic computing systems optimised for very low energy consumption, connectivity and embedded mobile functions; alternative manufacturing process technologies for semiconductor chips (frontend or backend) that support long-term device performance evolution, miniaturisation and lower cost while reducing environmental footprint; very advanced packaging solutions enabling heterogeneous integration of multiple functions and materials for communication (RF, mmWave or THz), sensing, actuation, power management and mixed active/passive integration.

Detailed eligibility and applicant information

The call is part of the Chips Joint Undertaking (Chips JU) activities under the Horizon Europe programme and targets collaborative R&I projects between European entities and partners from specified Digital Partnership and Trade and Technology Council (TTC) countries. The call is subject to participation restrictions described in Annex 4 to the Multiannual Work Programme; ownership control declarations are required for consortium members to assess eligibility relating to protection of European digital infrastructures and supply chains.

Eligible applicant types:Typical eligible applicants for Horizon Europe RIA actions and this Chips JU topic include: universities and higher education establishments; public research organisations and research institutes; small and medium-sized enterprises (SMEs); large enterprises and industry partners; non-profit organisations and NGOs; public bodies (national, regional authorities); research infrastructures; international partners where allowed by the Horizon rules; and consortia combining these types. The call materials and Submission System application form define legal entity validation requirements and specific eligibility restrictions; applicants must consult Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026 for full details.

Consortium requirement:The topic is designed for multi-partner collaborative projects. The text, the requirement to upload Ownership Control Declarations for each consortium member, and standard Horizon RIA practice indicate that a consortium is expected (multiple independent legal entities). Applicants should check the specific minimum consortium composition rules in Appendix 7 to the Work Programme and the call-specific instructions in the Submission System, as Horizon RIA topics normally require partners from multiple Member States and/or Associated Countries.

Geographic eligibility and target partner countries:Primary geographic scope: EU Member States and Horizon Europe Associated Countries. The call explicitly fosters collaboration with Digital Partnership and TTC countries: India, Singapore and Taiwan are named as targeted partners for low-TRL collaboration on chip design, manufacturing and packaging. The call page also notes that certain non-EU/non-Associated Countries may have specific provisions to make funding available for their participants; applicants should consult the Horizon Europe Programme Guide and the Work Programme Appendices for details on third-country participation and funding eligibility.

Target sectors and technology areas:The topic targets electronic components and systems, semiconductor design and manufacturing, advanced packaging, heterogeneous integration, photonic chips and neuromorphic computing. Relevant technology and application areas include: advanced packaging technologies, heterogeneous integration of multi-materials and functions, photonic integrated circuits, neuromorphic system architectures for ultra-low-power mobile or embedded devices, frontend and backend alternative manufacturing processes for semiconductors, RF/mmWave/THz communication components, sensing and actuation integration, power management and active/passive integrated solutions, and environmentally sustainable chip manufacturing.

Project maturity, scope and expected activities

The call focuses on low-TRL collaborative research and innovation activities. Projects are expected to propose research, concept development, early prototyping, design and integration studies, process development (frontend/backend), and packaging demonstrations that advance mid- to long-term device performance, miniaturisation and cost-efficiency while reducing environmental footprint. The call is not aimed at late-stage commercial scale-up alone but at earlier research and innovation stages that establish foundations for future industrial adoption.

Project stage:Idea / research / early development / low-TRL demonstration (pre-commercial).

Financial and procedural details

Funding type and mechanism:Research grant under Horizon Europe (HORIZON Action Grant, budget-based model). The action is funded by the Chips Joint Undertaking under Horizon Europe rules and uses the standard HORIZON-AG model grant agreement for RIA actions.

Funding amount and budget overview:Expected EU contribution per project: €2.0 million to €2.5 million (Chips JU information). The general budget overview for the topic indicates an overall topic budget mapped in 2026 and references expected grants and a budget envelope; consult the Submission System for the latest budget breakdown and number of expected grants (Chips JU page mentions expected grants and indicative amounts).

Co-funding and cost coverage:The topic page states: No co-financing by Chips JU Participating States following Article 141(2) SBA (100% Horizon Europe funding). Applicants must follow Horizon Europe eligibility and funding rules regarding direct costs, indirect costs, reimbursement rates for RIA actions and applicable unit costs or lump sums. Check the Model Grant Agreement, Programme Guide and Appendix 7 for specific funding rules and eligible cost categories.

Application method and stages:Single-stage open call. Proposals must be prepared and submitted via the EU Funding & Tenders Portal Submission System using the application form template available in the Submission System. The submission session for the topic is available in the Portal. The submission procedure is single-stage; applicants prepare a full proposal in one submission.

Application deadlines and timeline:Planned opening date: 7 July 2026. Submission deadline: 16 September 2026. Confirm exact time and portal submission windows in the Funding & Tenders Portal Submission System when preparing your submission.

Success rates:No specific success rate is published for this topic. The Chips JU page indicates a small number of expected grants for the topic; competition is expected to be strong for specialised semiconductor and packaging R&I projects. Applicants should treat selection as competitive and ensure strong alignment with expected outcomes, international collaboration elements, and evaluation criteria.

Mandatory documents, templates and submission content

Applicants must use the application form available in the Submission System. Reference and guidance documents include Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026, the Guide for Applicants for this topic, the Template of the Application Form, the Template of the Evaluation Form, the Model Grant Agreement for Horizon actions, and general Horizon Europe guidance (Programme Guide, Financial Regulation). Specific security and ownership control restrictions apply and Ownership Control Declarations (OCD) must be provided by consortium members as required by the topic.

1. 1Administrative forms and legal entity validation (PIC, LEAR appointment, bank account validation).
2. 2Application form Part A (administrative data) and Part B (scientific/technical proposal) in the Submission System template.
3. 3Description of the Action (Annex I/DoA elements required for Grant Preparation).
4. 4Work packages, deliverables, milestones, Gantt or schedule, and resource allocation (person-months, budget breakdown).
5. 5Impact section aligning with Chips JU expected outcomes and EU priorities for Electronic Components and Systems.
6. 6Implementation plan including consortium structure, management, risk management and IP/ownership control declarations.
7. 7Ethics and security sections where applicable.
8. 8Ownership Control Declarations for all consortium members (merged into single PDF or submitted individually if sensitive).

Suggested structure of the application (Part B high-level outline):Follow the Submission System Template and Part B page limits. Typical sections to prepare and populate: 1. Excellence: objectives, relation to the topic, state of the art, ambitious advances, research methodology and TRL progression. 2. Impact: expected outcomes, contribution to Chips JU objectives, exploitation and dissemination, value of EU-Digital Partnership collaboration. 3. Implementation: work plan and work packages, Gantt, deliverables and milestones, consortium and management, resource allocation, risk mitigation, ownership and security controls. 4. Budget: cost breakdown per partner, justification of resources and costs. 5. Ethics and Security: declarations and handling of sensitive technologies, export control considerations if applicable. 6. Annexes: CVs, letters of support, letters from international partners, Ownership Control Declarations and any requested templates.

Evaluation, legal and compliance notes

Proposals will be evaluated using Horizon/JU RIA evaluation criteria and the specific annotated evaluation form for HORIZON-JU. Applicants must comply with legal entity validation, financial capacity checks and ownership control assessments. The call is subject to participation restrictions protecting European digital infrastructures and supply chains; applicants must complete Ownership Control Declarations for each consortium member and follow the guidance in Appendix 7 and Annex G of the Work Programme General Annexes. Security and export-control related requirements may apply for sensitive technologies; address these clearly in the proposal.

Practical contacts and support

Submission and technical support:use the EU Funding & Tenders Portal Submission System to create and submit proposals. For call-specific questions contact Calls@chips-ju.europa.eu. Additional support resources: Horizon Europe Programme Guide, Model Grant Agreement documents, Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026, Funding & Tenders Portal Online Manual, National Contact Points, Enterprise Europe Network, European IPR Helpdesk, and the Portal IT Helpdesk.

Risks, restrictions and mandatory checks:The topic is subject to participation restrictions to protect European critical digital infrastructures and related supply chains. Applicants must complete Ownership Control Declarations to enable eligibility and security checks. Export control, sensitive technology handling and IP ownership must be addressed explicitly. If consortium members are from non-EU/non-Associated Countries, confirm in advance whether those third-country participants are eligible for funding and under which terms by consulting the Horizon Europe Programme Guide and the call-specific documentation.

Key recommended actions for applicants

1. 1Review Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026 and the call-specific Guide for Applicants and application template in the Submission System.
2. 2Form an interdisciplinary consortium including EU partners and the named Digital Partnership/TTC country partners (India, Singapore, Taiwan) where relevant, ensuring legal entity validation and readiness to provide Ownership Control Declarations.
3. 3Define clear work packages addressing one or more of the call outcomes (neuromorphic system designs, alternative manufacturing processes, advanced packaging for heterogeneous integration) and present measurable milestones and deliverables.
4. 4Prepare security, ethics and ownership control documentation early and coordinate third-country participation and funding eligibility checks.
5. 5Use the Submission System application form template and adhere strictly to Part B page limits, structure and the annotated evaluation criteria.

This opportunity is a targeted Chips JU RIA call seeking to create collaborative research links between European research and industry actors and leading Digital Partnership/TTC country communities in semiconductor design, manufacturing and packaging. It funds low-TRL, high-impact research and early demonstration activities that can strengthen EU technology capabilities in advanced packaging, heterogeneous integration and photonics, accelerate neuromorphic computing concepts for low-power mobile/embedded applications, and develop alternative manufacturing process technologies that improve performance and reduce environmental footprint. Applicants should prepare a multi-partner proposal using the Submission System template, comply with Ownership Control Declaration requirements, and align project impact and dissemination with Chips JU and Horizon Europe objectives.

For full procedural details, templates and legal documents see the Submission System and the call-related reference documents. Applicants are advised to consult the Guide for Applicants and the relevant Work Programme appendices early in proposal preparation¹.

Footnotes

1. 1Call-specific guidance, templates and legal references are available in the Funding & Tenders Portal and on the Chips JU pages, including Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026 and the Template of Application Form for HORIZON-JU Chips JU Call Details

Overview and Strategic Focus

This Research and Innovation Action (RIA) fosters low-TRL collaboration between European entities and partners from India, Singapore, and Taiwan to advance chip design, manufacturing, and packaging technologies ¹. The call specifically targets areas where Digital Partnership countries offer complementary expertise, including advanced packaging, heterogeneous integration, and photonic chip technologies ².

Key Expected Outcomes:Projects must deliver innovative design concepts for neuromorphic computing with ultra-low energy consumption, alternative semiconductor manufacturing processes for heterogeneous integration, and advanced packaging solutions for communication, sensing, and power management applications ³.

Who Should Apply

Consortia must include at least one entity from an EU Member State or Horizon Europe Associated Country and at least one partner from India, Singapore, or Taiwan ¹. Eligible participants include large companies, SMEs, academic institutions, and research organizations with legal status in the covered areas ³.

Funding and Budget Details

The call operates under a single-stage submission procedure with no co-financing from Chips JU Participating States, adhering to Article 141(2) of the SBA ¹. The total indicative EU budget for the call is €5,000,000, supporting approximately three projects ².

Critical Requirements and Restrictions

1. 1Participation is subject to restrictions for the protection of European digital infrastructures and supply chains as defined in Annex 4 of the Work Programme
2. 2Consortium members must submit Ownership Control Declarations (OCD) to assess eligibility, though this is optional for the Project Outline phase
3. 3Projects must focus on low-TRL (Technology Readiness Level) collaboration to foster early-stage innovation
4. 4No national co-financing is provided by Chips JU Participating States for this specific call

Applicants must verify that their consortium complies with ownership control restrictions to protect European digital security, a mandatory step for eligibility assessment ¹. The Ownership Control Declaration forms must be merged into a single PDF and uploaded with the proposal unless they contain sensitive data, which allows for individual submission ¹.

Submission and Support Information

Proposals must be submitted electronically via the EU Funding & Tenders Portal starting from 7 July 2026 until the deadline on 16 September 2026 ². For specific questions regarding this call, contact Chips JU directly at calls@chips-ju.europa.eu ².

Footnotes

1. 1Official call details from Chips JU: ECS International collaboration - Call with Digital Partnership and TTC countries, available at Chips JU Call Details.
2. 2Portuguese FCT announcement confirming single-phase submission and budget details: FCT 2026 ECS Calls.
3. 3EU Funding & Tenders Portal topic description outlining expected outcomes and eligible bodies: EU Topic Details.