Skills Hubs of Excellence

Call DIGITAL-JU under the Digital Europe Programme (Chips for Europe Initiative) funds the creation of specialised academic Hubs of Excellence in semiconductor technology areas. The total budget is approximately €20,000,000 with an indicative EU contribution of about €4,000,000 per project (min €1,000,000; max €10,000,000) and a funding rate of 50% co-funded with national authorities. Eligible applicants are higher education institutions, research organisations and consortia including industry partners to deliver industry-aligned Bachelor, Master and PhD programmes and enhance mobility, diversity and links to Chips Act infrastructure. Single-stage proposals must be submitted via the EU Funding & Tenders Portal by 24 September 2026, following the Guide for Applicants and providing required ownership and national co-funding documentation.

What it funds

Creation of specialised academic Hubs of Excellence in critical semiconductor technology areas (examples: chip design, manufacturing, photonics, power electronics). Projects must develop industry-aligned Bachelor, Master and PhD programmes and promote mobility, diversity and strong links with Chips Act infrastructure.

Who can apply

Consortia led by higher-education institutions, research organisations or universities, in partnership with industry and other relevant stakeholders. Proposals follow the DIGITAL JU Simple Grant model and the call is co-funded with national funding authorities.

Deadline:Full proposal deadline 24 September 2026 (single-stage). Submission opens from 7 July 2026 via the Funding & Tenders Portal Topic page.

1. 1Type of action: DIGITAL JU Simple Grants (one-stage, full proposal).
2. 2Expected EU contribution per project: indicative about €4 000 000; call documents show min €1 000 000 and max €10 000 000 and an expected number of grants = 2.
3. 3Co-funding: projects are co-funded with national funding authorities (NFA); applicants must follow call-specific templates and ownership control declarations.

Expected outcomes include a sustained pipeline of highly qualified semiconductor graduates with shorter time-to-readiness for industry roles, increased diversity and mobility, and strong complementarity with pilot lines, design platforms and Competence Centres ¹.

Footnotes

1. 1Call information and guide for applicants available from Chips JU and the EU Funding & Tenders Portal: Chips JU call page and Portal topic.

High-level description

Purpose and expected outcomes

This call funds the creation of specialised academic Hubs of Excellence in critical semiconductor technology areas (examples given: chip design, manufacturing, photonics, power electronics). Projects should deliver industry-aligned Bachelor, Master and PhD programmes with strong links to Chips Act infrastructure such as pilot lines, design platforms and Competence Centres. Expected outcomes include a sustained pipeline of highly qualified semiconductor graduates, reduced time-to-readiness for industry roles, greater inflow of diverse talent including women and underrepresented groups, improved intra- and extra-EU student mobility, and complementarity with existing Chips Act infrastructure.

Call identifier and administrative details:Topic code DIGITAL-JU-CHIPS-2026-SKILLS-HoE-SG. Type of action: DIGITAL JU Simple Grants (Simple Grant). Opening (submission session available): 2026-07-07. Deadline (single-stage full proposal): 24 September 2026. Submission procedure: single-stage full proposal. Contact for call questions: Calls@chips-ju.europa.eu. Applicants submit via the EU Funding & Tenders Portal entry for this topic Topic Page ¹.

Eligibility and applicant requirements

Eligible applicant types

Primary target applicants:universities and higher education institutions (public and private), research institutes, doctoral schools and academic consortia aiming to create or upscale Bachelor, Master and PhD curricula in semiconductor technologies. Expected partners and eligible participants include research performing organisations, public bodies (ministries or regional authorities involved in education), non-profit organisations, industry partners (SMEs and large enterprises) for alignment with labour market needs, competence centres and training providers. Associated partners, affiliated entities, subcontractors and third parties providing in-kind contributions are permitted in line with the DEP model grant agreement rules. The call is targeted to consortia; single-beneficiary mono-grants are not indicated as the primary expected model for a Hub of Excellence given the requirement for industry alignment and mobility, but the general grant model permits mono-beneficiary grants where justified under the Digital Programme rules.

Consortium requirement

Submission is single-stage. The call supports consortia and partner search is allowed (portal indicates Allow Partner Search: true). Proposals should normally present a consortium that demonstrates academic leadership, clear participation of industry partners and links to relevant Chips JU infrastructure. The DEP Annotated Model Grant Agreement provisions on beneficiaries, affiliated entities, associated partners and subcontracting apply and a consortium agreement is typically required. The Chips JU call page and Guide for Applicants define consortium composition requirements and expectations.

Geographic eligibility and participation restrictions

The call is managed by the Chips Joint Undertaking (Chips JU) under the Digital Programme and primarily targets participants established in eligible countries under EU Digital Programme rules (EU Member States and possibly associated countries as defined in the Programme legal bases and work programme). The call page explicitly states that the topic is subject to participation restrictions for the protection of European digital infrastructures, communication and information systems and related supply chains; applicants must provide Ownership Control Declarations for each consortium member for eligibility assessment and may be required to respect additional national funding authority co-funding conditions. Non-EU participants and special statuses (international organisations, pillar-assessed entities) are subject to the DEP MGA provisions.

Financial and operational features

Funding type and form

Primary funding mechanism:grant. Specifically, a DIGITAL JU Simple Grant (budget-based action grant under the Digital Programme model grant agreement — DEP MGA). Grants are budget-based and may include actual costs, unit costs, flat rates or other allowed forms where specified in the call documentation.

Funding amount and expected number of projects:Call-level budget information: the portal/budget mapping shows expectedGrants: 2 for this topic, with a budget-year map indicating an available maximum contribution per project up to €10,000,000 for 2026 in the topic mapping. The Chips JU topic page gives an indicative EU contribution per project of approximately €4,000,000. The minimum and maximum contributions reported in the portal budget mapping are €1,000,000 (min) and €10,000,000 (max).

1. 1Expected EU contribution per project: approximately €4,000,000 (as stated on the Chips JU call page).
2. 2Portal budget mapping: min contribution €1,000,000; max contribution €10,000,000; expected number of grants 2 (subject to availability of funds and evaluation).
3. 3Funding form: budget-based action grant under DEP MGA (Digital Programme Annotated Model Grant Agreement).

Co-funding and national co-financing

The Chips JU call page states Mode:Co-funded with the National Funding Authority (NFA). This means the EU contribution is co-funded with national authorities for participating beneficiaries where national co-funding applies. Applicants should consult national budget tables and national authorities for matching co-funding rules. The DEP MGA and call-specific Guide for Applicants set out co-funding requirements and financial rules.

Nature of support

Primary support:monetary grant contributions to project beneficiaries for eligible costs. Secondary/non-financial benefits expected include: access and linkage to Chips Act infrastructure (pilot lines, design platforms, Competence Centres), increased visibility, networked industry-academia collaboration, student mobility support and alignment with European training and skills frameworks.

Application process and evaluation

Application type and stages

Call modality:one-stage full proposal (single-stage submission procedure). Applicants prepare a full proposal and submit via the EU Funding & Tenders Portal. The submission session opened 2026-07-07 and closes 2026-09-24. Application follows the Application Form templates (Part A administrative data and Part B technical description) and the Guide for Applicants and related call documents provided on the Chips JU call page.

Number of selection stages

Single-stage evaluation:1 stage (no separate preliminary proposal phase indicated; full proposal evaluated in one step). Evaluation uses the published evaluation form template for this topic.

Success rates

The call documentation does not publish an explicit success rate. Portal budget metadata indicates expectedGrants: 2. Success rate will depend on the number and quality of proposals received and national co-funding availability. Applicants should assume competition will be strong and prepare consortia that clearly demonstrate academic excellence, industry alignment and complementary use of Chips infrastructure.

Project characteristics and expected technical content

Target sectors and technology focus

Thematic focus:semiconductor education and skills development across chip design, semiconductor manufacturing, photonics, power electronics and related advanced semiconductor domains. Projects should cover curriculum development (Bachelors, Masters, PhD), hands-on training aligned with pilot lines and design platforms, internships and industry placements, mobility schemes (intra- and extra-EU), inclusive recruitment and measures to increase diversity in the talent pipeline.

Project stage and maturity expected

This topic funds the creation or scaling of education and training programmes rather than basic research or industrial product development. Expected maturity: programme design and implementation readiness (development and validation of curricula, establishment of partnerships with industry and infrastructure providers, pilot training activities and mobilities). Projects should demonstrate capacity to deploy accredited degree programmes, supervise doctoral training and deliver industry-ready graduates.

Administrative and document requirements

Key templates and documents applicants must consult and use

1. 1Template of Application Form Part B (Topic-specific Part B template available on chips-ju.europa.eu).
2. 2Guide for Applicants for DIGITAL-JU-CHIPS-2026-SKILLS-HoE-SG.
3. 3Evaluation form template for the topic (provided to bidders).
4. 4Annotated Model Grant Agreement for DIGITAL/DEP (DEP MGA — Multi & Mono).
5. 5Appendix 8 of Work Programme - Chips for Europe Initiative (contains topic-specific annexes and guidance).
6. 6Ownership Control Declaration template (mandatory for participation eligibility and national security/ownership checks).
7. 7National Budgets Table template (xls) — used to document national co-funding where applicable.
8. 8Funding & Tenders Portal Online Manual and FAQs for submission technical guidance.

Applicants must follow the page limits and layout for proposal Part B as described in Part B of the Application Form and the Guide for Applicants (call page and Appendix 8 of the Work Programme). Ownership Control Declarations are required for ownership screening and must be provided as merged PDF unless individual submission is necessary for sensitive data.

Evaluation and award

Evaluation is conducted using the published Evaluation Form template for this topic. Proposals will be assessed against criteria set out in the Guide for Applicants and evaluation template (typically excellence/relevance, impact, quality and efficiency of implementation, consortium composition, and management). Specific security and ownership eligibility checks will be applied prior to or during evaluation according to the Chips JU Multiannual Work Programme Annexes.

Practical advice for applicants

1. 1Assemble a multidisciplinary consortium combining strong academic institutions with industry partners, Competence Centres and pilot line/design platform linkages to demonstrate practical training pathways and internships.
2. 2Demonstrate concrete plans for Bachelor, Master and PhD curriculum development, accreditation (if applicable) and mechanisms for shortening time-to-readiness for industry roles (placements, internships, joint supervision, co-funded positions).
3. 3Address inclusiveness and diversity measures explicitly (recruitment targets, outreach, scholarships, support measures for underrepresented groups).
4. 4Include clear plans for intra- and extra-EU mobility (credit transfer, recognition, joint/double degrees, scholarships) and for complementarity with existing Chips Act infrastructure.
5. 5Prepare Ownership Control Declarations and legal/financial documentation early to satisfy participation restrictions and national funding co-financing requirements.

Quick reference — structured extraction

Templates and application form structure:the call provides a Part B template for technical description. Applicants should prepare Part A administrative data in the portal and Part B technical proposal according to the provided RTF/Word Part B template. The Guide for Applicants details required sections and page limits; Appendix 8 of the Work Programme (Chips for Europe Initiative) contains specific topic appendices. Required supporting documents include Ownership Control Declarations (one per consortium member, merged into a single PDF unless sensitive), the National Budgets Table for national co-funding information, and any declarations required by DEP MGA (e.g., declarations on related parties, financial capacity where applicable).

Suggested structure for Part B technical proposal:Follow the Part B template exactly. Typical required sections include: 1. Excellence: objectives, state-of-the-art, rationale for the Hub of Excellence in the chosen semiconductor domain; 2. Impact: expected outcomes for skills pipeline, mobility, diversity and linkages with Chips infrastructure; 3. Implementation: work plan, WP descriptions, deliverables, milestones, risk management, exploitation and sustainability beyond the grant; 4. Consortium: roles, CVs, evidence of capacity, letter(s) of support from industry and pilot lines; 5. Budget and justification: personnel, equipment, travel, subcontracting, co-funding plan and national budget commitments; 6. Ethics and security: ownership control declarations and any security-related measures; 7. Quality assurance and monitoring. Consult the Guide for Applicants for exact headings, page limits and templates.

Final summary

What this opportunity is about and how to explain it:The Skills Hubs of Excellence call finances the establishment and scaling of specialised academic Hubs that will train and produce industry-ready graduates in strategically important semiconductor technology areas. The initiative aims to close the skills gap in Europe for chip design, manufacturing, photonics and power electronics by funding academic programmes (from Bachelor to PhD) that are tightly aligned with industry needs and European Chips infrastructure. Applicants should form consortia that combine higher education institutions, research centres and industry partners, demonstrate concrete curriculum and mobility plans, include measures to increase diversity, and show clear complementarity with pilot lines, design platforms and Competence Centres. Funding is provided as a budget-based DIGITAL JU Simple Grant under the DEP MGA; the call is co-funded with national funding authorities and requires compliance with ownership and participation restrictions. Applicants must use the provided Application Form templates, Guide for Applicants and other call documents, submit a single-stage full proposal via the EU Funding & Tenders Portal by 24 September 2026, and prepare to provide Ownership Control Declarations and evidence of national co-funding where required. For contact and submission, use the Chips JU call page and the EU Funding & Tenders Portal entry for this topic Topic Page ¹.

Footnotes

1. 1Primary source: EU Funding & Tenders Portal topic page and Chips JU call page for DIGITAL-JU-CHIPS-2026-SKILLS-HoE-SG. See the call topic details and call documents for full rules and templates: ec.europa.eu and chips-ju.europa.eu

Key Facts at a Glance

Objective and Expected Outcomes

This call funds the creation of specialised academic 'Hubs of Excellence' in critical semiconductor technology areas such as chip design, manufacturing, photonics, and power electronics. The primary goal is to establish a sustained pipeline of highly qualified semiconductor graduates with shorter time-to-readiness for industry roles ².

Key Expected Outcomes:Projects must deliver greater inflow of diverse talent including women and underrepresented groups, improved intra- and extra-EU student mobility, and strong complementarity with existing Chips Act infrastructure like pilot lines and Competence Centres.

Who Should Apply and Eligibility

Eligible applicants include higher education institutions, universities, and research organisations capable of building industry-aligned Bachelor, Master, and PhD programmes. Consortia are expected to include partners from the semiconductor industry to ensure alignment with market needs.

1. 1Higher Education Institutions (HEIs) and Universities
2. 2Research and Technology Organisations (RTOs)
3. 3Semiconductor Industry Partners (for consortium alignment)
4. 4Entities established in EU Member States or Associated Countries

Scope and Programme Requirements

Projects must focus on critical semiconductor technology areas and develop comprehensive educational curricula. The scope explicitly requires the integration of industry-aligned training to reduce the gap between academic learning and industry readiness.

Required Programme Levels:Projects must build and deliver programmes at the Bachelor, Master, and PhD levels, ensuring a continuous talent pipeline from undergraduate to advanced research stages.

Budget and Financial Conditions

The total available budget is approximately €20 million, with an expected grant of €4 million per project. The funding rate is 50% of eligible costs, meaning beneficiaries must cover the remaining 50% through national funding or other sources ¹.

1. 1Minimum Contribution: €1,000,000
2. 2Maximum Contribution: €10,000,000
3. 3Indirect Costs: Reimbursed at 7% flat rate of eligible direct costs
4. 4Cost Eligibility: Standard actual costs (personnel, subcontracting, travel, equipment)

Submission and Evaluation Process

The submission procedure is single-stage. Proposals must be submitted via the EU Funding & Tenders Portal. The application form includes Part B (technical description) and requires adherence to the Guide for Applicants available on the Chips JU website ³.

Key Submission Steps:1. Register in the Participant Register; 2. Access the topic page; 3. Prepare Part B of the Application Form; 4. Submit before the deadline of 24 September 2026.

Contact and Support Information

For specific help related to this call, applicants should contact Calls@chips-ju.europa.eu. General IT support for the portal can be accessed via the IT Helpdesk for issues like forgotten passwords or access rights ³.

Footnotes

1. 1Budget Overview details from the EU Funding & Tenders Portal: Total budget €20M, 50% funding rate, min €1M, max €10M per project.
2. 2Call Description: Expected outcomes include a sustained pipeline of highly qualified semiconductor graduates and shorter time-to-readiness for industry roles.
3. 3Support Info: Contact Calls@chips-ju.europa.eu for call-specific help; Guide for Applicants available on Chips JU website.