RIA Resilience call reinforcing Europe's strength in 6G radio communication systems

HORIZON-JU is a single-stage Research and Innovation Action to fund the design, implementation and testing of microelectronic building blocks for 6G Front End Modules (FR3, 7–15 GHz) with an indicative EU contribution of approximately €20 million and an application deadline of 16 September 2026. Projects should start from TRL 3–4 and target validated concepts, addressing energy efficiency, spectrum sharing, SBFD, ISAC, PDK/EDA support, base die development and SiP pre‑industrialisation. Eligible legal entities under Horizon/Chips JU rules (typically multi-partner consortia) may apply; participation restrictions apply and Ownership Control Declarations must be submitted for consortium members. Proposals must follow the Chips JU and Horizon Europe templates and be submitted via the Funding & Tenders Portal following the Guide for Applicants.

Who can apply

Eligibility highlights

Consortia of research organisations, industry partners and other legal entities established in eligible EU Member States and associated countries may apply. Participation restrictions and Ownership Control Declarations apply as described in the Chips JU Work Programme.

What it funds:Research and innovation actions to design, implement and test key microelectronic building blocks for 6G Front End Modules (FR3 FEM), including RF, compute, power, beamforming, packaging, PDK/EDA support and steps towards pre‑industrial SiP integration ¹.

1. 1Advance cost-performance and energy-efficiency to meet IMT 2030 targets, including reducing mobile transmission energy consumption
2. 2Enable spectrum sharing, large antenna arrays, broadband carrier aggregation, SBFD full-duplex and ISAC capabilities
3. 3Deliver semiconductor models, PDK/EDA support and base die development to enable future in-field validation
4. 4Strengthen a European microelectronics supplier ecosystem and encourage collaboration with pilot lines for pre-industrialisation

Single-stage submission. Applicants must follow templates and guidance in the Chips JU call documents and the Appendix 7 ECS Work Programme ¹.

Footnotes

1. 1Topic page and call documents: Chips JU topic HORIZON-JU-CHIPS-2026-2-RIA

Call identification and administrative details

Call Title:HORIZON-JU. Type of action: HORIZON JU Research and Innovation Actions (RIA). Submission model: single-stage electronic submission through the Funding & Tenders Portal (Electronic Submission Service). Call opening: 7 July 2026 (planned opening date). Deadline: 16 September 2026. Expected EU contribution per project: approximately €20 000 000 (budget for the topic: €20 000 000; expected number of grants: 1; minimum EU contribution per grant: €1 000 000; maximum EU contribution per grant: €20 000 000).

Call webpages and contact:Main topic page on the Funding & Tenders Portal and Chips JU call page. Contact for questions: Calls@chips-ju.europa.eu. To submit use the Funding & Tenders Portal submission entry point for topic HORIZON-JU Topic submission.

Scope and expected outcomes

Objective:design, specification, implementation and testing of key microelectronics building blocks of a Frequency Range 3 (FR3) Front End Module (FEM) for 6G radio communication systems, paving the way for future integration into a complete integrated FEM system (including System in Package SiP pre-industrialisation planning and collaboration with Pilot Lines).

1. 1Progress the state of the art to optimise cost-performance trade-offs to meet ITU IMT 2030 targets: maximum data rate, user data rate, spectral efficiency, and enable a 50% reduction in mobile transmission system energy consumption.
2. 2Allow operational implementation of spectrum sharing with other spectrum users within the selected FR3 sub-band.
3. 3Enable integration of very large arrays for increased path loss compensation at FR3 frequencies while keeping the FEM compact, low-power and high-efficiency.
4. 4Provide high bandwidth for carrier aggregation with broadband RF transceivers.
5. 5Enable SBFD (Sub-Band non-overlapping Full-Duplex) for uplink coverage extension (3GPP Rel-19 5G-Advanced) with appropriate interference cancellation techniques.
6. 6Enable ISAC (Integrated Sensing and Communications) supporting monostatic and bistatic radar functionality, addressing interference management, bandwidth, and potentially distinct waveforms for sensing and communication.
7. 7Build on core technologies and IP blocks with a view to in-package integration across computing, RF, power generation technologies and beamforming technologies as a minimum.
8. 8Base work on semiconductor technology development supporting characterised RF models, standard-cell support for compute, interconnect and memory, and be supported with relevant PDK and analog/digital EDA tool support.
9. 9Enable base die development for the most critical functions and subsystem integration and pave the way toward their complete integration and validation in real environments beyond the project.
10. 10Enable FEM system integration including packaging and plan for pre-industrialisation of an integrated FEM SiP (collaboration with Pilot Lines encouraged).
11. 11Advance European know-how in microelectronics domains where Europe is currently less advanced, notably in digital technologies from the design perspective, and stimulate the emergence of an alternative European ecosystem of technology suppliers for FEM modules.
12. 12Stimulate progress in design tools, notably Process Design Kits (PDKs).
13. 13Contribute to reinforcing a European ecosystem of microelectronic suppliers for the telecom industry and measure extent of contribution to that objective.

Technical and technology requirements

Proposals must address microelectronics building blocks suitable for FR3 frequencies (higher frequency range envisioned for 6G), including RF front-end components, power generation technologies, computing elements, beamforming technologies, and packaging/SiP integration. Deliverables and activities should include semiconductor technology development with characterised RF models, provision of PDKs, EDA support, development of base die(s) implementing critical functions, subsystem integration tests and implementation/testing of interference cancellation for SBFD and ISAC functionalities, and demonstration of spectrum sharing capabilities within chosen FR3 sub-band(s).

Eligibility and participation conditions

Type of applicants:The call is open to legal entities eligible under Horizon Europe/Chips JU rules. Typical eligible applicant types include startups, SMEs, large enterprises, universities, research institutes, non-profit organisations, public research organisations, pilot line operators, RTOs, standardisation bodies, and Member State public bodies where applicable. Individual natural persons are not typical eligible applicants under this RIA call; participation is expected to be through legal entities. The call is subject to the general Horizon Europe and Chips JU rules for legal entity validation, LEAR appointment and financial capacity checks.

Restriction of participation and Ownership Control Declaration:This call is subject to participation restrictions to protect European digital infrastructures and supply chains as described in Annex 4 to the Multiannual Work Programme. Participants must fill in Ownership Control Declarations (OCD) for each consortium member and upload them with the proposal; sensitive data may be submitted individually when needed. See the Ownership Control Declaration template among call documents Ownership Control Declaration template. ¹

Funding, consortium and project size

Budget:The topic has an indicative budget of €20 000 000 for 2026 with an expected single grant awarded (expected EU contribution per project around €20 000 000). The Budget Overview indicates expectedGrants: 1, minContribution: €1 000 000 and maxContribution: €20 000 000. The funding instrument is an action grant (HORIZON Action Grant Budget-Based).

1. 1Funding type: Grant (Horizon/Chips JU action grant).
2. 2Consortium requirement: Consortium expected. The call text and Chips JU RIA rules and templates indicate multi-partner consortia are expected for large-scale microelectronics development, integration and pilot-line collaboration. Single participants could be allowed only if they can meet all scientific, technological, industrial and legal requirements, but the scale and expected impact point to a consortium-based proposal (the actions metadata show participation restrictions and OCDs for consortium members).
3. 3Beneficiary geographic eligibility: Entities eligible under Horizon Europe / Chips JU rules, typically EU Member States and Horizon-associated countries; national contact points exist for non-EU participants and NCPs in many non-associated countries are mentioned as support. The call is run by the Chips Joint Undertaking under Horizon Europe (EU/associated country eligibility applies).
4. 4Target sectors: Microelectronics, telecommunications (6G radio communication systems), RF engineering, semiconductor design and manufacturing, packaging/SiP, EDA/tooling and PDK development, wireless communications including sensing (ISAC), antenna and beamforming technologies, power electronics for RF and mobile transmission.
5. 5Project stage: Development, validation and pre-industrialisation. Projects are expected to develop and characterise semiconductor technologies and IP blocks, implement base dies, perform integration and testing, and plan pre-industrialisation and validation in real environments beyond the project.
6. 6Project duration and scale: Typical for large-scale RIA at this funding level (EUR ~€20M) would be multi-year (often 36 to 54 months). Applicants must consult the Template Application Form Part B and Guide for Applicants for precise permitted duration and eligible costs.

Evaluation, application process and templates

Submission procedure:single-stage via the Funding & Tenders Portal. Applicants must use the official application templates provided in the call documents (Template Application Form Part B IA-RIA-FT FPP, 2026 Guide for Applicants RIA_IA_FT-FPP, Evaluation Form Chips IA RIA FT-FPP). Proposals are assessed using the Chips JU evaluation and selection procedures and the annotated model grant agreement applicable for EU funding programmes 2021-2027.

Available templates and mandatory documents:Mandatory and recommended documents to be downloaded from the Chips JU call page and Funding & Tenders Portal include: Template Application form Part B IA-RIA-FT FPP (Part B content and page limits described in that template and the Guide for Applicants), 2026 Guide for Applicants RIA_IA_FT-FPP, Evaluation Form, Ownership Control Declaration form template, National Budgets Table template (xls), Chips JU Multiannual Work Programme, Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026, Rules for legal entity validation and other general annexes. Applicants must follow the Part B page limits and layout as described in the application form and call documentation.

1. 1Template Application Form Part B (IA-RIA-FT FPP): contains sections for excellence, impact, implementation, consortium description, work packages, deliverables, milestones, and budget breakdown. Follow Part B page limits and layout.
2. 22026 Guide for Applicants RIA_IA_FT-FPP: guidance for structure, budget, and priorities.
3. 3Evaluation Form Chips IA RIA FT-FPP: evaluation criteria and scoring for experts.
4. 4Ownership Control Declaration template: required for participation restrictions and assessment of ownership/control for all consortium members.
5. 5National Budgets Table template: used to report requested contributions against national budget allocations where relevant.

Application structure outline (based on Template Application Form Part B and Guide for Applicants): 1) Excellence: objectives, relation to work programme, concept and approach, novelty, and TRL targets; 2) Impact: expected outcomes and impacts, contribution to EU priorities and Chips JU objectives, pathway to pre-industrialisation and ecosystem strengthening; 3) Implementation: work plan, work packages, tasks, deliverables, milestones, risk management, management structure, resources and consortium capabilities; 4) Budget: breakdown per partner, justification of resources, subcontracting and third-party arrangements; 5) Ethics and security: Ownership Control Declarations, compliance with participation restrictions and other security-related annexes; 6) Appendices: letters of support, pilot line collaboration agreements, PDK/EDA tool access arrangements, IP / exploitation plan.

Assessment criteria, stages and success expectations

Evaluation:Proposals will be evaluated by independent experts against the standard RIA criteria (excellence, impact, quality and efficiency of implementation) as adapted in the Chips JU Evaluation Form for RIA/IA. The call references the Evaluation Form Chips IA RIA FT-FPP which should be consulted for criteria weighting and thresholds.

1. 1Application stages: Single-stage submission; evaluation and selection stage. There is no separate two-stage PO/DO phase indicated for this topic (submissionProcedure: single-stage). However, usual post-evaluation steps include grant preparation (negotiation and finalisation) and grant agreement signature.
2. 2Number of stages applicants must pass: 1 formal evaluation stage (single-stage), followed by selection and grant preparation (administrative/financial checks).
3. 3Success rates: Not published for this specific call. Given the high requested funding per project (EUR ~€20M) and expectedGrants:1, competition will be strong and overall success rate is expected to be low. Applicants should assume a competitive selection environment; historical Chips JU topic success rates vary and applicants should consult Chips JU statistics and previous calls for indicative success rates.

Co-funding, eligible costs and financial rules

Co-funding:The action grant is budget-based under Horizon/Chips JU rules. Projects must comply with Horizon financial rules and the Annotated Model Grant Agreement. The listing shows minContribution and maxContribution but does not explicitly state mandatory co-funding percentages in the scraped text. Under standard Horizon rules, beneficiaries must co-finance eligible costs not covered by the EU contribution; the exact co-financing requirement depends on the action type and grant conditions described in the Guide for Applicants and model grant agreement. Applicants must consult the Annotated Model Grant Agreement and Guide for Applicants for eligibility of costs, reimbursement rates and co-funding obligations.

Support services and additional guidance

Support available:Funding & Tenders Portal Online Manual, Funding & Tenders Portal IT helpdesk, Research Enquiry Service, National Contact Points, Enterprise Europe Network, European IPR Helpdesk, CEN-CENELEC and ETSI Research Helpdesks for standardisation guidance. Partner Search tool is allowed and encouraged to identify consortium partners. Applicants should consult Chips JU call-specific instructions and the Appendix 7 to the Multiannual Work Programme for the Electronic Components and Systems (ECS) for detailed priorities and technical guidance. The call page contains specific call documents and templates to be downloaded and used.

Mentioned countries and beneficiary scope

The call is launched by the Chips Joint Undertaking under Horizon Europe. Eligible beneficiaries are legal entities from EU Member States and Horizon Europe associated countries as defined by Horizon rules. The scraped content does not list specific countries by name; it references EU and associated country eligibility and National Contact Points including non-associated countries. Therefore the beneficiary scope should be considered EU and Horizon-associated countries unless otherwise stated in the work programme or restriction annexes.

Summary of categorisation answers

1. 1Eligible Applicant Types: Startups, SMEs, large enterprises, universities, research institutes, non-profit organisations, research and technology organisations (RTOs), pilot line operators, public research organisations, standardisation bodies, and other legal entities eligible under Horizon/Chips JU rules. Individual natural persons are not a primary eligible applicant type.
2. 2Funding Type: Grant (Horizon/Chips JU action grant; HORIZON Action Grant Budget-Based).
3. 3Consortium Requirement: Consortium is expected for the scale and objectives of the topic, although single applicants remain subject to eligibility rules; the call metadata and expected outputs indicate multi-partner consortia are the norm.
4. 4Beneficiary Scope (Geographic Eligibility): EU Member States and Horizon Europe associated countries (Horizon eligibility framework applies).
5. 5Target Sector: Microelectronics, telecommunications (6G RF front-end modules), semiconductor design and manufacturing, RF engineering, packaging and SiP, EDA and PDK tool development, ISAC, beamforming and antenna arrays, power generation technologies for RF, and adjacent telecom value chain suppliers.
6. 6Mentioned Countries: No specific countries were listed in the scraped text; region specified is EU/Chips JU scope. Applicants should assume EU and Horizon-associated countries unless Annexes specify further restrictions.
7. 7Project Stage: Development, validation and pre-industrialisation (TRL progression toward integration and real-environment validation outside the project).
8. 8Funding Amount: Rough funding range: expected single grant around €20 000 000; min contribution per grant listed as €1 000 000, max contribution €20 000 000; expectedGrants: 1.
9. 9Application Type: Open call via single-stage electronic call on the Funding & Tenders Portal (open call, single-stage).
10. 10Nature of Support: Monetary grant funding (EU contribution) combined with expectation of non-monetary interactions (collaboration with Pilot Lines, access to pilot manufacturing and pre-industrialisation facilities), but primary modality is monetary grant.
11. 11Application Stages: 1 main evaluation stage (single-stage submission), followed by administrative/financial checks and grant preparation (typically 1 selection stage + grant preparation).
12. 12Success Rates: Not provided; expected low success probability given large single award and competitive field. No explicit historical success rate data in scraped content.
13. 13Co-funding Requirement: Not explicitly stated in the scraped text; projects must follow Horizon financial rules and the Annotated Model Grant Agreement for co-funding/reimbursement rules. Applicants must consult the Guide for Applicants and MGA for the action-specific financial rules.

Templates and application structure guidance

Applicants must use the official Template Application Form Part B (IA-RIA-FT FPP) and adhere to Part B page limits and layout. The application should cover the following sections and content items (as described in the template and Guide for Applicants):

1. 1Administrative forms and Part A data: legal entity information, financial identification, contact persons, LEAR designation, budget per beneficiary and requested EU contribution.
2. 2Part B: Excellence: detailed objectives, relation to IMT 2030 targets and call expected outcomes, research and innovation methodology, TRL baseline and target TRL(s), novelty and state-of-the-art analysis, soundness of concept and feasibility.
3. 3Part B: Impact: expected outcomes and concrete impacts on the European microelectronic supplier ecosystem, contribution to energy efficiency targets (50% energy reduction objective), spectrum sharing, enabling SBFD and ISAC, and pathway to pre-industrialisation and market uptake; exploitation and dissemination plan, IP management and standardisation contributions.
4. 4Part B: Implementation: work plan and work packages, detailed tasks, deliverables, milestones, Gantt or timetable, risk assessment and mitigation, description of partnership and roles (including Pilot Line collaboration plan), management structure and governance, resources and staff effort, justification of staff and other costs, subcontracting and third parties.
5. 5Ethics and security: Ownership Control Declarations (OCD) for each consortium member, ethics self-assessment, data management plan if relevant, compliance with security restrictions described in the call annexes.
6. 6Annexes: Letters of commitment from pilot lines or industrial partners, PDK/EDA access arrangements, MOUs for testbeds or real-environment validation, detailed CVs of key personnel, and additional supporting documents requested in the template or Guide for Applicants.

Applicants should follow the evaluation criteria and scoring detailed in the Evaluation Form Chips IA RIA FT-FPP, structure their Part B accordingly, and ensure all mandatory templates (Ownership Control Declaration, National Budgets Table if relevant) are completed and uploaded. Proposals must be submitted before the deadline via the Funding & Tenders Portal submission entry point for the topic.

Final summary

This Chips JU Research and Innovation Action HORIZON-JU is a resilience call focused on the 6G FR3 Front End Module. It aims to fund one large, consortium-driven project (indicative EU funding ~€20M) to design, implement, characterise and test the microelectronic building blocks needed for compact, energy-efficient, high-performance FR3 FEMs suitable for IMT 2030 targets (6G). The project must cover semiconductor technology development with RF models and PDK support, base die development, advanced RF functions including SBFD and ISAC, array/beamforming integration, packaging and SiP pre-industrialisation planning, and should foster the emergence of a European supply ecosystem for FEM modules. The call uses the Horizon/Chips JU rules, mandates Ownership Control Declarations due to participation restrictions, requires electronic single-stage submission via the Funding & Tenders Portal, and applicants must use the provided templates and follow the Guide for Applicants and Evaluation Form. Collaboration with Pilot Lines is encouraged and a concrete pre-industrialisation plan is part of the expected deliverables. Applicants should prepare a multi-partner consortium encompassing microelectronics design, semiconductor process expertise, RF and antenna engineering, packaging/SiP, EDA/PDK tool providers and industry partners to ensure feasibility and pathway to market and ecosystem strengthening. For full procedural details consult the call documents on the Chips JU website and the Funding & Tenders Portal and contact Calls@chips-ju.europa.eu for clarifications.

Footnotes

1. 1Ownership Control Declaration template and guidance are provided among the call documents on the Chips JU call page; applicants must consult Appendix 4 and related annexes in the Multiannual Work Programme for participation restrictions and rules.

Call Details and Funding

Technical Scope and Expected Outcomes

The HORIZON-JU call targets the design and implementation of integrated microelectronic building blocks for 6G radio communication Front End Modules (FEMs) in the FR3 frequency range (7–15 GHz) ¹. This Research and Innovation Action (RIA) aims to strengthen Europe's technological sovereignty in 6G RF technologies by developing highly integrated, energy-efficient, and high-performance semiconductor solutions ².

Indicative EU Budget:The maximum EU budget for this topic is €20 million, with approximately €20 million expected per project for one funded project ³.

Submission Deadline:The full project proposal deadline is 16 September 2026 at 17:00 Brussels time, in a one-stage procedure ⁴.

Target TRL:Projects are expected to start from TRL 3–4 and advance towards validated technology concepts during the project ⁵.

1. 1Design and specification of key microelectronics building blocks for an FR3 FEM
2. 2Optimization of cost-performance trade-offs to meet ITU IMT 2030 specifications (data rate, spectral efficiency)
3. 3Enabling 50% reduction in mobile transmission system energy consumption
4. 4Operational implementation of spectrum sharing within the FR3 sub-band
5. 5Integration of large antenna arrays for path loss compensation with compact, low-power FEMs
6. 6Support for Sub-Band Full-Duplex (SBFD) and Integrated Sensing and Communications (ISAC)
7. 7In-package integration of computing, RF, power generation, and beamforming technologies
8. 8Development of semiconductor models, PDKs, and EDA support for analog/digital design
9. 9Base die development for critical functions and subsystem integration
10. 10FEM system integration with advanced packaging technologies

Eligible applicants include SMEs, large enterprises, universities, research and technology organizations (RTOs), and public organizations eligible under Chips JU and Horizon Europe rules ⁶. The call is open to organizations from EU Member States, associated countries, and third countries, subject to participation restrictions for the protection of European digital infrastructures ⁷.

Consortiums must submit Ownership Control Declarations (OCD) for all members to assess eligibility regarding European digital infrastructure protection; these can be merged into a single PDF or submitted individually if sensitive data is involved ⁸. Collaboration with relevant Pilot Lines is encouraged, and a plan for pre-industrialization of an integrated FEM SiP is part of the target outcomes ⁹.

The project must contribute to reinforcing a European ecosystem of microelectronic suppliers for the telecom industry and progress European know-how in digital technologies where Europe is currently less advanced ¹⁰. Proposals should demonstrate a clear pathway from research to future industrial exploitation and European technological leadership in 6G communication technologies ¹¹.

Standard Chips JU and Horizon Europe admissibility, eligibility, and evaluation rules apply, with the maximum EU contribution to a single partner limited to 30% of the total EU funding ¹². For questions, contact Calls@chips-ju.europa.eu ¹³.

Footnotes

1. 1Chips JU Call Details: RIA Resilience call on 6G Front End Module, chips-ju.europa.eu
2. 2KET Market: RIA Resilience Call on 6G Front End Module, ketmarket.eu
3. 3Chips JU Open & Upcoming Calls: Indicative EU Budget €20 million, chips-ju.europa.eu
4. 4KET Market: Submission deadline 16 September 2026, one-stage call, ketmarket.eu
5. 5Chips JU RIA Definition: TRL 3–4 start, topictree.ideal-ist.eu
6. 6KET Market: Eligible applicants include SMEs, large enterprises, universities, RTOs, ketmarket.eu
7. 7Chips JU Call Documents: Participation restrictions for digital infrastructure protection, chips-ju.europa.eu
8. 8Chips JU Call Documents: Ownership Control Declaration template, chips-ju.europa.eu
9. 9Chips JU Call Details: Pilot Line collaboration and pre-industrialization plan, chips-ju.europa.eu
10. 10Chips JU Call Description: Progress in digital technologies and European ecosystem, ec.europa.eu
11. 11KET Market: Pathway to industrial exploitation and technological leadership, ketmarket.eu
12. 12KET Market: Maximum EU contribution to single partner 30%, ketmarket.eu
13. 13Chips JU Contact: Calls@chips-ju.europa.eu, chips-ju.europa.eu