DIGITAL-JU-CHIPS-2025-CSA-DET

The DIGITAL-JU-CHIPS-2025-CSA-DET grant opportunity under the Digital Europe Programme aims to enhance Europe's semiconductor design capabilities through the establishment and integration of Design Enablement Teams (DETs). The call focuses on projects that will develop and support services essential for semiconductor design, including access to Electronic Design Automation (EDA) tools, Process Design Kits (PDKs), and fabrication services.

Eligible applicants include organizations with semiconductor design expertise, such as universities, research institutes, and small to medium enterprises, potentially in collaboration with foundries and cloud providers. Although a consortium is not explicitly required, partnerships are strongly encouraged to integrate necessary expertise.

The funding type is a grant, with a total budget of €5 million available for up to 10 projects, with individual grants ranging from €500,000 to €1 million. The application process is single-stage, and the call opens on June 4, 2025, with a submission deadline of July 30, 2025, and evaluations scheduled for September 2025.

The geographic scope for this funding is limited to EU member states, EEA countries, and associated states. The primary goals include providing comprehensive support to chip designers and enhancing the European semiconductor ecosystem's capacity.

Each DET must secure authorization from at least one semiconductor foundry to provide access to PDKs, ensuring that the necessary relationships and communication channels are in place for technical assistance. The call aligns with the Chips Joint Undertaking's objectives to strengthen Europe’s semiconductor industry and reduce reliance on non-EU technologies.

Co-funding from participants is required, with the EU contributing 50% of the total project costs. Success rates for similar grant calls vary, but the anticipated competition for this funding is expected to be moderate given the specified budget and the number of grants available.

The overarching aim of the grant is to foster collaboration within the semiconductor sector, ensuring that companies have the necessary resources to innovate and develop advanced technologies in chip design. Interested applicants are encouraged to review detailed guidelines and eligibility criteria in the applicable appendices of the Chips Joint Undertaking's 2025 Work Programme.

The DIGITAL-JU-CHIPS-2025-CSA-DET call, under the Digital Europe Programme (DIGITAL), aims to establish and integrate Design Enablement Teams (DETs). It falls under the DIGITAL-JU-CSA DIGITAL JU Coordination and Support Actions, utilizing a DIGITAL Action Grant Budget-Based [DIGITAL-AG] mechanism. This is a forthcoming call with a single-stage deadline model. The planned opening date is 04 June 2025, and the deadline for submission is 30 July 2025 at 17:00:00 Brussels time.

The expected outcome of this call is the establishment of functional DETs with core functions including:

Deployment of Electronic Design Automation (EDA) tools on the cloud: DETs will manage secured cloud instances facilitating access to essential design tools and simulation environments. To this end, DETs may contract with a cloud provider of their choice to setup this infrastructure. It is expected that prospective DETs demonstrate experience in commercial designs using tools from established EDA vendors.

Design flow support and customisation: DETs will assist users in setting up and customising design environments and flows, ensuring smooth progression from initial setup to tape-out.

Application engineering: DETs will offer dedicated application engineering support, addressing specific user needs and challenges throughout the development process.

Access to Process Design Kits (PDKs): DETs will provide users with access to the necessary PDKs and ADKs for their design projects. Each DET must have legal authorisation to use and/or provide its users access to PDKs/ADKs of at least one semiconductor foundry.

Design expertise: DETs will provide users with access to the necessary design expertise for their design projects, directly via the DET’s resources and/or through partnerships with third parties.

Prototyping and fabrication services: DETs will facilitate prototyping and fabrication services including packaging and testing through partnerships with leading foundries or aggregators, the Chips for Europe Initiative pilot lines or other relevant pilot lines. Each DET must have already established direct or indirect relationships with at least one semiconductor foundry, enabling efficient communication and ensuring technology advice and support to their users.

The conditions for this call are as follows:

1. Admissibility Conditions: Proposal page limit and layout are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU. The proposal page limits and layout are also described in Part B of the Application Form available in the Submission System and in the Guide for Applicants from the Call documents section.

2. Eligible Countries are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

3. Other Eligible Conditions are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

4. Financial and operational capacity and exclusion are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

5a. Evaluation and award: Submission and evaluation processes are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

5b. Evaluation and award: Award criteria, scoring and thresholds are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

5c. Evaluation and award: Indicative timeline for evaluation and grant agreement: Evaluation is scheduled for 01-12/09/2025, and the Grant Agreement is expected by 01/03/2026.

The call documents include: Set-up and integration of Design Enablement Teams. More information can be found on the Chips JU website and within the Multiannual Programme 2023-2027 and DEP Work Programmes.

Additional documents include: EU Financial Regulation 2024/2509, Rules for Legal Entity Validation, LEAR Appointment and Financial Capacity Assessment, EU Grants AGA — Annotated Model Grant Agreement, Funding & Tenders Portal Online Manual, Funding & Tenders Portal Terms and Conditions, and Funding & Tenders Portal Privacy Statement.

The topic budget for the year 2025 is 5,000,000 EUR. The contributions range from 500,000 to 1,000,000 EUR, and the indicative number of grants is 10.

There are 17 searches of partners to collaborate on this topic. LEARs, Account Administrators, or self-registrants can publish partner requests for open and forthcoming topics after logging into the Portal, as well as any user having an active public Person profile.

The submission system is planned to be opened on the date stated on the topic header.

For help related to this call, contact calls@chips-ju.europa.eu. Additional resources include the Funding & Tenders Portal FAQ – Submission of proposals, the IT Helpdesk for technical questions, and the Online Manual for a step-by-step guide through the Portal processes.

In summary, this call focuses on establishing and integrating Design Enablement Teams within the Digital Europe Programme, specifically targeting the semiconductor industry. It aims to provide resources and support for the design, prototyping, and fabrication of chips. The call encourages collaboration and provides funding for projects that can demonstrate experience in commercial designs and establish relationships with semiconductor foundries. The total budget is 5 million EUR, with individual grants ranging from 500,000 to 1 million EUR. The call is structured as a single-stage process with a deadline in July 2025, and successful projects are expected to begin in early 2026. Applicants should carefully review the call documents and guidelines, particularly Appendix 6 CEI of the 2025 Work Programme of the Chips JU, to ensure their proposals meet all admissibility and eligibility criteria.

Eligible Applicant Types: The eligible applicant types are not explicitly stated in the provided text. However, given the nature of the call, which focuses on coordination and support actions for setting up and integrating Design Enablement Teams (DETs), eligible applicants could include universities, research institutes, SMEs, large enterprises, and other organizations with expertise in semiconductor design, cloud computing, and related fields. The mention of LEARs (Legal Entity Appointed Representatives), Account Administrators, and self-registrants suggests that a wide range of legal entities can apply, provided they meet the eligibility criteria outlined in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

Funding Type: The funding type is a grant, specifically a DIGITAL Action Grant Budget-Based [DIGITAL-AG]. The call is for DIGITAL JU Coordination and Support Actions (DIGITAL-JU-CSA).

Consortium Requirement: The text does not explicitly state whether a consortium is required. However, the mention of "Partner search announcements" and the need for DETs to have relationships with semiconductor foundries and cloud providers suggests that consortia or partnerships are beneficial and possibly expected. The core functions of DETs, such as providing access to PDKs/ADKs, design expertise, and prototyping/fabrication services, may necessitate a consortium approach to cover all required areas of expertise.

Beneficiary Scope (Geographic Eligibility): The eligible countries are described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU. Without access to this document, the specific geographic eligibility cannot be determined. However, given that this is a Digital Europe Programme call, it is likely that the eligibility includes EU member states and potentially associated countries.

Target Sector: The target sector is the semiconductor industry, specifically focusing on the design and development of microchips. The call aims to support the setup and integration of Design Enablement Teams (DETs), which will provide essential services and infrastructure to chip designers. This includes access to EDA tools, design flows, PDKs, design expertise, and prototyping/fabrication services. The call falls under the broader category of ICT (Information and Communication Technology) and targets the DeepTech sector related to semiconductor design and manufacturing.

Mentioned Countries: No specific countries are mentioned in the provided text. The call is part of the Digital Europe Programme, suggesting a focus on the European Union.

Project Stage: The project stage is focused on the development and implementation of Design Enablement Teams (DETs). This includes setting up infrastructure, establishing partnerships, and providing services to chip designers. The projects are likely in the development and demonstration stages, aiming to validate and deploy DETs that can support the broader semiconductor ecosystem.

Funding Amount: The total budget for the topic DIGITAL-JU-CHIPS-2025-CSA-DET is EUR 5,000,000. The indicative contribution per grant ranges from EUR 500,000 to EUR 1,000,000.

Application Type: The application type is an open call with a single-stage submission process. The planned opening date is 04 June 2025, and the deadline for submission is 30 July 2025 at 17:00:00 Brussels time.

Nature of Support: The beneficiaries will receive money in the form of a grant. This funding is intended to support the setup and operation of Design Enablement Teams (DETs), covering costs related to infrastructure, personnel, partnerships, and service provision.

Application Stages: The application process consists of a single stage. Applicants must submit a complete proposal by the deadline. The proposals will then be evaluated based on the criteria described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.

Success Rates: The indicative number of grants is 10, and the total budget is EUR 5,000,000. The success rate cannot be determined without knowing the expected number of applications. However, with a budget of EUR 5,000,000 and an indicative number of 10 grants, the competition is likely to be moderate.

Co-funding Requirement: The text does not explicitly mention a co-funding requirement.

Summary:

This opportunity is a call for proposals under the Digital Europe Programme (DIGITAL), specifically targeting the semiconductor industry. The call, DIGITAL-JU-CHIPS-2025-CSA-DET, aims to fund Coordination and Support Actions (CSA) to set up and integrate Design Enablement Teams (DETs). These DETs will provide essential services and infrastructure to chip designers, including access to EDA tools, design flows, PDKs, design expertise, and prototyping/fabrication services. The call has a total budget of EUR 5,000,000, with individual grants ranging from EUR 500,000 to EUR 1,000,000. The application process is a single-stage submission, with a deadline of 30 July 2025. The evaluation of proposals will be conducted in September 2025, and the grant agreements are expected to be signed by March 2026. The call is relevant to a wide range of organizations with expertise in semiconductor design, cloud computing, and related fields. Applicants are encouraged to form consortia or partnerships to cover all required areas of expertise. The call aims to strengthen the European semiconductor ecosystem by providing chip designers with the resources and support they need to develop innovative products. The core functions of DETs include deployment of Electronic Design Automation (EDA) tools on the cloud, design flow support and customisation, application engineering, access to Process Design Kits (PDKs), design expertise, and prototyping and fabrication services. Each DET must have legal authorisation to use and/or provide its users access to PDKs/ADKs of at least one semiconductor foundry and have already established direct or indirect relationships with at least one semiconductor foundry, enabling efficient communication and ensuring technology advice and support to its users. The call is managed by the Chips Joint Undertaking (Chips JU) and aligns with the Multiannual Programme 2023-2027.